Computing has transformed from being a luxury to a day-to-day necessity in our lives. With the rise of applications like machine learning and 5G mobile networks, the demand for high computing performance has reached unprecedented levels. This shift has led to the development of more energy-efficient and cost-effective systems, such as chiplets, to facilitate the seamless operation of these advanced applications.
Chiplets are unpackaged dies that can be grouped together in a package with other chiplets within a single chip. Each chiplet is designed to carry out a specific function, contributing to the overall performance of the system. The approach to chiplets involves having a library of chiplet options, which are then integrated into a package and interconnected using a die-to-die interconnect scheme.
As the complexity and data rates of on-package routing continue to increase, there is a corresponding rise in signal and power integrity issues within the system. According to Jingtong Hu, an associate professor of electrical and computer engineering at the University of Pittsburgh, this necessitates the development of more efficient tools for analysis and validation to support robust design. Hu and his team have addressed this need by introducing SPIRAL, a framework for signal-power integrity co-analysis of high-speed interchiplet serial links.
SPIRAL revolves around building equivalent models for the interchiplet links, using a machine-learning based transmitter model and an impulse response based model for the channel and receiver. By co-analyzing signal-power integrity using equivalent methods, SPIRAL offers a more refined approach compared to the conventional Simulation Program with Integrated Circuit Emphasis (SPICE). SPICE, while widely used in integrated circuit and board-level design, falls short in providing accurate analysis and validation for chiplets due to the novelty of this technology.
The development of chiplets has paved the way for enhancing computing performance by offering a more efficient and adaptable system architecture. Through innovations like SPIRAL, the challenges of signal and power integrity in high-speed interchiplet serial links can be effectively addressed, leading to a more reliable and optimized computing environment. As computing continues to evolve, the role of chiplets in facilitating cutting-edge applications will only grow in significance.